#include "pladc.h"

uint8 pladc_acc_5v_an0_index;
uint8 pladc_vss_an1_index;
uint8 pladc_kl30_mon_an2_index;
uint8 pladc_kl15_mon_an3_index;
uint8 pladc_Pkey1_an4_index;
uint8 pladc_paddle_up_an5_index;
uint8 pladc_paddle_dowm_an6_index;
uint8 pladc_led_p_check_an7_index;
/*jzy: adc channel must start from 0*/
const PladcConfig pladc_config[] = {
	/*ad_channel				sample_period_ms	ref_5v_power_index			first_order_coeff		gain_numerator	gain_denominator	offset	callback	config_index_ref*/
	{ADC_CHANNEL_AN00,			10U,				INVALID_AD_CONFIG_INDEX,	INVALID_AD_COEF,		1U,				1U,					0U,		NULL,		&pladc_acc_5v_an0_index     },/*VCC5V*/
	{ADC_CHANNEL_AN01,			10U,				INVALID_AD_CONFIG_INDEX,	INVALID_AD_COEF,		1U,				1U,					0U,		NULL,		&pladc_vss_an1_index        },/*VSS*/
	{ADC_CHANNEL_AN02,			10U,				INVALID_AD_CONFIG_INDEX,	INVALID_AD_COEF,		127U,			27U,				pladc_define_internal_voltage(0.75),		NULL,		&pladc_kl30_mon_an2_index   },/*AI-KL30-1-CHE-MON*/
	{ADC_CHANNEL_AN03,			10U,				INVALID_AD_CONFIG_INDEX,	INVALID_AD_COEF,		127U,			27U,				pladc_define_internal_voltage(0.64),		NULL,		&pladc_kl15_mon_an3_index   },/*AI-KL15-CHE-MON*/
	{ADC_CHANNEL_AN04,			10U,				INVALID_AD_CONFIG_INDEX,	INVALID_AD_COEF,		1U,				1U,					0U,		NULL,		&pladc_Pkey1_an4_index      },/*P-KEY-1*/
	{ADC_CHANNEL_AN05,			10U,				INVALID_AD_CONFIG_INDEX,	INVALID_AD_COEF,		1U,				1U,					0U,		NULL,		&pladc_paddle_up_an5_index  },/*Paddle UP*/
	{ADC_CHANNEL_AN06,			10U,				INVALID_AD_CONFIG_INDEX,	INVALID_AD_COEF,		1U,				1U,					0U,		NULL,		&pladc_paddle_dowm_an6_index},/*Paddle DOWN*/
	{ADC_CHANNEL_AN07,			10U,				INVALID_AD_CONFIG_INDEX,	INVALID_AD_COEF,		1U,				1U,					0U,		NULL,		&pladc_led_p_check_an7_index},/*LED-P-check*/
};


const uint8 pladc_config_count = array_length(pladc_config);
PladcData pladc_adc_data[array_length(pladc_config)];
uint16 pladc_device_value[array_length(pladc_config)];
